The present invention relates generally to an apparatus and method for planarizing a surface of a semiconductor wafer. The present invention particularly relates to an apparatus and method for the chemical-mechanical planarization of a surface of a semiconductor wafer.
Fabrication of a multi-level integrated circuit involves numerous processing steps. For example, after impurity regions have been deposited within a semiconductor substrate and gate areas defined upon the substrate, interconnect routing is placed on the semiconductor topography and connected to contact areas thereon. An interlevel dielectric is then formed upon and between the interconnect routing, and more contact areas are formed through the dielectric to the interconnect routing. A second level of interconnect routing may then be placed upon the interlevel dielectric and coupled to the first level of interconnect routing via the contact areas arranged within the dielectric. Additional levels of interconnect routing and interlevel dielectric may be formed if desired.
Unfortunately, unwanted surface irregularities may form in the topological surface of one or more layers employed by an integrated circuit. The formation of such irregularities can lead to various problems during integrated circuit fabrication. The concept of utilizing chemical and mechanical abrasion to planarize and remove surface irregularities of a topological surface is well known in the industry as chemical-mechanical polishing (xe2x80x9cCMPxe2x80x9d). A typical CMP process involves urging a semiconductor wafer face-down on a wafer track of a polishing pad which is fixedly attached to a rotatable table or platen. Elevationally extending portions of the downward-directed wafer surface are positioned such that they contact the rotating pad. A fluid-based chemical, often referred to as a xe2x80x9cslurryxe2x80x9d having abrasion particles disposed therein is deposited upon the pad such that the slurry becomes disposed at the interface between the pad and the wafer surface. The slurry initiates the polishing process by chemically reacting with the surface material being polished. The polishing process is facilitated by the rotational movement of the pad relative to the wafer (or vice versa) to remove material catalyzed by the slurry so as to planarize the surface of the wafer surface.
However, the above described arrangement for planarizing the wafer surface suffers from several drawbacks. For example, one drawback of the above described arrangement is that the fluid dynamics of the slurry is relied upon to advance the abrasion particles underneath the semiconductor wafer. This is a problem because urging the semiconductor wafer against the polishing pad makes it difficult for the abrasion particles contained within the slurry to be transported from the periphery of the wafer to the center of the wafer. Therefore, a higher concentration of abrasion particles are present at the periphery of the semiconductor wafer as compared to the center. This concentration gradient results in a different planarization rate for the semiconductor periphery relative to the center. Having different planarization rates on the same semiconductor wafer is undesirable since it decreases the planarization uniformity of the semiconductor surface.
Another drawback of the above described arrangement is that material removed from the wafer surface forms a xe2x80x9cglazexe2x80x9d on the wafer track of the pad. This glaze decreases the effectiveness of the pad in planarizing the surface of the wafer. Mechanisms utilized to condition the pad surface, e.g. remove the glaze, also suffer from several drawbacks. For example, the mechanisms fail to remove the glaze from the entire wafer track upon a single rotation of the pad. As a result, certain portions of the wafer track will have the glaze disposed thereon while other portions will be glaze free while being advanced under the semiconductor wafer. Only having the glaze partially removed from the wafer track can also decrease the planarization uniformity of the semiconductor surface.
Thus, a continuing need exists for an apparatus and method for planarizing the surface of a semiconductor wafer which addresses one or more of the above described problems.
In accordance with one embodiment of the present invention, there is provided an arrangement for planarizing a surface of a semiconductor wafer. The arrangement includes a planarizing member having a planarizing surface configured to be (i) positioned in contact with and (ii) moved relative to the surface of the semiconductor wafer so as to remove material from the surface of the semiconductor wafer such that surface of the semiconductor wafer is planarized. The arrangement also includes an adherence promoting ligand chemically bonded to the planarizing surface of the planarizing member. The arrangement further includes an abrasion particle chemically bonded to the adherence promoting ligand such that the abrasion particle is attached to the planarizing surface of the planarizing member.
In accordance with another embodiment of the present invention, there is provided a method of planarizing a surface of a semiconductor wafer with a planarizing member having a planarizing surface. The method includes the steps of (i) disposing an adherence promoting ligand onto the planarizing surface so as to form a chemical bond between the adherence promoting ligand and the planarizing surface and (ii) disposing an abrasion particle onto the planarizing surface so as to form a chemical bond between the adherence promoting ligand and the abrasion particle such that abrasion particle is attached to the planarizing surface.
In accordance with yet another embodiment of the present invention, there is provided an apparatus for planarizing a surface of a semiconductor wafer. The apparatus includes a planarizing member having a planarizing surface configured to be (i) positioned in contact with and (ii) moved relative to the surface of the semiconductor wafer so as to remove material from the surface of the semiconductor wafer such that surface of the semiconductor wafer is planarized. The planarizing surface has a wafer track defined thereon. The apparatus also includes a conditioning bar having a conditioning portion positioned in contact with the wafer track. The conditioning portion is configured so that the conditioning portion extends completely across the wafer track.
In accordance with still another embodiment of the present invention there is provided a method of planarizing a surface of a semiconductor wafer with a planarizing member having a planarizing surface with a wafer track defined thereon. The method includes the step of locating a conditioning portion of a conditioning bar in contact with the wafer track. The conditioning portion being configured such that the conditioning portion extends completely across the wafer track. The method also includes the step of positioning the surface of the semiconductor wafer in contact with the wafer track. The method further includes the step of moving the planarizing member relative to the surface of the semiconductor wafer so as to remove material from the surface of the semiconductor wafer.
In accordance with yet another embodiment of the present invention there is provided an apparatus for planarizing a surface of a semiconductor wafer. The apparatus includes a planarizing member having a planarizing surface. The apparatus also includes a wafer carrier configured to receive and hold the semiconductor wafer such that the surface of the semiconductor wafer is in contact with the planarizing surface. The apparatus further includes a slurry mixture disposed on the planarizing surface. The apparatus also includes a carrier activating mechanism operatively coupled to the wafer carrier so that the carrier activating mechanism (i) urges the surface of the semiconductor wafer against the planarizing surface at a first pressure for a first period of time and (ii) urges the surface of the semiconductor wafer against the planarizing surface at a second pressure for a second period of time. The first pressure is greater than the second pressure such that the slurry is advanced from an outer periphery of the semiconductor wafer toward a center portion of the semiconductor wafer.
In accordance with still another embodiment of the present invention there is provided a method of planarizing a surface of a semiconductor wafer. The method includes the step of repeatedly urging the surface of the semiconductor wafer against a planarizing surface of a planarizing member (i) at a first pressure for a first period of time and (ii) at a second pressure for a second period of time. The first pressure is greater than the second pressure, so as to cause a slurry disposed on the planarizing surface to be advanced from an outer periphery of the semiconductor wafer toward a center portion of the semiconductor wafer.
It is an object of the present invention to provide a new and useful apparatus and method for planarizing a surface of a semiconductor wafer.
It is also an object of the present invention to provide an improved apparatus and method for planarizing a surface of a semiconductor wafer.
It is yet another object of the present invention to provide an apparatus and method for planarizing the surface of a semiconductor wafer which increases the planarization uniformity of a surface of a semiconductor wafer.